This paper, published in the March 2002 edition of the IEEE Journal of Solid State Circuits, looks at "a hierarchical automated design flow for low-energy direct-mapped signal processing integrated circuits." The author argues that directly implementing signal processing algorithms in hardware uses far less computational energy than software implementations, while still keeping chip area small. Current approaches to design automation are examined and compared to the direct-mapped method. Examples of test chips and preliminary results are also provided, and the author identifies plans for future investigation.