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Design and Demonstration of an Advanced On-Board Processor for the Second-Generation Precipitation Radar

The on-board processor of a prototype NASA satellite is described in this technical paper from 2003. A Next-Generation Precipitation Radar, the satellite will require a processor capable of meeting "the challenging requirements for measuring precipitation from space." Many engineers and technology professionals who work with field-programmable gate arrays (FPGAs) will find this report of interest, as it describes a remarkable processing system that uses FPGAs to satisfy the requirements of the satellite. The innovations used in the system's design push the limits of FPGA technology, as is shown by the authors.
Archived Scout Publication URL
  • https://scout.wisc.edu/report/nsdl/met/2003/0509
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Date of Scout Publication
May 9th, 2003
Date Of Record Creation
May 9th, 2003 at 12:35pm
Date Of Record Release
May 9th, 2003 at 12:35pm
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